{"id":6983,"date":"2026-05-16T13:43:00","date_gmt":"2026-05-16T11:43:00","guid":{"rendered":"http:\/\/stocks-future.com\/?guid=3d95663fb267eaebd441914a755c927f"},"modified":"2026-05-16T13:43:00","modified_gmt":"2026-05-16T11:43:00","slug":"tetramem-announces-22nm-multi-level-rram-analog-in-memory-computing-soc-milestone","status":"publish","type":"post","link":"https:\/\/stocks-future.com\/?p=6983","title":{"rendered":"TetraMem Announces 22nm Multi-Level RRAM Analog In-Memory Computing SoC Milestone"},"content":{"rendered":"<p>SAN JOSE, Calif.--(BUSINESS WIRE)--<a href=\"https:\/\/twitter.com\/hashtag\/AI?src=hash\" >#AI<\/a>--TetraMem Inc., a Silicon Valley\u2013based semiconductor company developing analog in-memory computing (IMC) solutions, today announced the successful tape-out, manufacturing, and initial silicon validation of its MLX200 platform, a 22nm multi-level RRAM-based analog IMC system-on-chip (SoC).<\/p><br\/><a href=\"https:\/\/mms.businesswire.com\/media\/20260516556464\/en\/2807347\/5\/MLX200_die_2026-05-16.jpg\"><img src=\"https:\/\/mms.businesswire.com\/media\/20260516556464\/en\/2807347\/22\/MLX200_die_2026-05-16.jpg\" \/><\/a><br\/><a href=\"https:\/\/mms.businesswire.com\/media\/20260516556464\/en\/2807347\/5\/MLX200_die_2026-05-16.jpg\"><img src=\"https:\/\/mms.businesswire.com\/media\/20260516556464\/en\/2807347\/21\/MLX200_die_2026-05-16.jpg\" \/><\/a><br\/><a href=\"https:\/\/mms.businesswire.com\/media\/20260516556464\/en\/2807346\/5\/Vertical.jpg\"><img src=\"https:\/\/mms.businesswire.com\/media\/20260516556464\/en\/2807346\/22\/Vertical.jpg\" \/><\/a><br\/><a href=\"https:\/\/mms.businesswire.com\/media\/20260516556464\/en\/2807346\/5\/Vertical.jpg\"><img src=\"https:\/\/mms.businesswire.com\/media\/20260516556464\/en\/2807346\/21\/Vertical.jpg\" \/><\/a><p>\nThe achievement marks a significant step toward the commercialization of analog computing architectures based on emerging non-volatile memory technologies, addressing the growing challenges of data movement, power consumption, and thermal constraints in modern AI systems.<\/p><p>\nAs AI workloads continue to scale, system performance is increasingly constrained by the cost of moving data between memory and compute units. Analog in-memory computing offers a fundamentally different approach by performing computation directly within memory arrays, significantly reducing data movement and improving system-level efficiency. TetraMem\u2019s MLX200 platform integrates multi-level RRAM arrays with mixed-signal compute engines to enable high-throughput vector-matrix operations within memory, while maintaining compatibility with advanced CMOS processes.<\/p><p>\nThe multi-level RRAM technology demonstrated at the TSMC 22nm process provides key attributes required for practical deployment, including CMOS compatibility with minimal additional process complexity, low-voltage and low-current operation, strong retention and endurance characteristics, and high multi-level capability that supports improved memory and compute density. Early silicon results indicate consistent functionality across arrays, supporting the viability of this approach for both embedded non-volatile memory and compute-in-memory applications.<\/p><p>\nThis milestone builds on TetraMem\u2019s earlier work on the MX100 platform, fabricated on the TSMC 65nm CMOS process, where the company demonstrated multi-level RRAM devices with thousands of conductance levels (\u201cThousands of conductance levels in memristors integrated on CMOS,\u201d Nature, March 2023), as well as high-precision analog computing capabilities (\u201cProgramming memristor arrays with arbitrarily high precision for analog computing,\u201d Science, February 2024). These prior results established a strong scientific and engineering foundation for scaling the technology to more advanced nodes.<\/p><p>\nSince 2019, TetraMem has worked closely with the world leading semiconductor foundry to advance RRAM technology from early-stage research into manufacturable silicon. The progress achieved at 22nm reflects continued development in process integration, device uniformity, and system-level co-design.<\/p><p>\nThe MLX200 and MLX201 platforms are designed to support power- and latency-sensitive edge AI applications, including voice and audio processing, wearable devices, IoT systems, and always-on sensing. Evaluated sampling is expected to begin in the second half of 2026, and multi-level RRAM memory IP is available for evaluation and potential licensing.<\/p><p>\nDr. Glenn Ge, Co-founder and CEO of TetraMem, commented, \u201c<i>This milestone reflects years of close collaboration with our foundry partner TSMC and demonstrates the feasibility of bringing multi-level RRAM and analog in-memory computing from computing architecture breakthrough into advanced-node commercial silicon. We believe this approach provides a practical path to improving energy efficiency and scalability for next-generation AI systems<\/i>.\u201d<\/p><p>\nThe successful realization of the MLX200 platform highlights the viability of multi-level RRAM-based analog computing on advanced semiconductor processes. TetraMem will continue to advance this technology to support emerging AI workloads with improved energy efficiency and system scalability.<\/p><p>\n<b>About TetraMem<\/b><\/p><p>\nTetraMem is a Silicon Valley\u2013based semiconductor company pioneering analog in-memory computing using multi-level RRAM technology. Its architecture integrates memory and compute to significantly reduce data movement and improve energy efficiency for AI workloads. With a strong foundation in device, circuit, and system co-design, TetraMem is advancing scalable solutions for edge AI and future high-performance computing, working closely with leading foundries and ecosystem partners to bring fundamental science breakthrough technologies into commercial variable volume production.<\/p><br\/> <b>Contacts<\/b> <br\/><p>\n<b>Media Contact:<\/b><br\/>Glenn Ge\n<br\/><a  href=\"mailto:pr@tetramem.com\" rel=\"nofollow\" shape=\"rect\">pr@tetramem.com<\/a><\/p>","protected":false},"excerpt":{"rendered":"<p>SAN JOSE, Calif.&#8211;(BUSINESS WIRE)&#8211;#AI&#8211;TetraMem Inc., a Silicon Valley\u2013based semiconductor company developing analog in-memory computing (IMC) solutions, today announced the successful tape-out, manufacturing, and initial silicon validation of its MLX&#8230;<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[],"class_list":["post-6983","post","type-post","status-publish","format-standard","hentry","category-infos-businesswire"],"_links":{"self":[{"href":"https:\/\/stocks-future.com\/index.php?rest_route=\/wp\/v2\/posts\/6983","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/stocks-future.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/stocks-future.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/stocks-future.com\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/stocks-future.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=6983"}],"version-history":[{"count":1,"href":"https:\/\/stocks-future.com\/index.php?rest_route=\/wp\/v2\/posts\/6983\/revisions"}],"predecessor-version":[{"id":6984,"href":"https:\/\/stocks-future.com\/index.php?rest_route=\/wp\/v2\/posts\/6983\/revisions\/6984"}],"wp:attachment":[{"href":"https:\/\/stocks-future.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=6983"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/stocks-future.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=6983"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/stocks-future.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=6983"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}